The invention relates to an integrated circuit arrangement with an open-collector transistor of the npn-transistor type, the collector of which is connected to an open-collector output of the circuit arrangement and the emitter of which is connected to a ground terminal of the circuit arrangement, and with an output voltage being provided as the open-collector output.
A circuit arrangement of this kind is known from the reference literature Tietze/Schenk: "Halbleiter-Schaltungstechnik" (Semiconductor Circuit Technology), Springer-Verlag, Berlin, 1978, page 161. The circuit arrangement described there has a npn transistor as an output stage with the emitter of this transistor is connected to a ground terminal and with the collector of the transistor connected to an open-collector output of the circuit arrangement and with an output voltage being applied to this output. The open-collector output can be connected to open-collector outputs of other circuit arrangements and, through a resistor, to a supply terminal to which a supply voltage is fed.
From the reference literature Millman/Grabel: "Microelectronics", McGraw-Hill, New York, 1988, page 180, it is known furthermore that the collector region of a npn transistor in an integrated circuit can be isolated from other circuit components in the circuit arrangement by a p-doped separation zone. The main disadvantage of this circuit arrangement is that the collector region of the open-collector transistor and the separation zone form a parasitic diode which can become conductive and thus allow parasitic currents to flow. Such parasitic effects can lead to the destruction or incorrect functioning of the circuit arrangement.